The present invention relates generally to the field of semiconductor manufacturing, and more particularly to a method for forming low parasitic trim gate last MOSFET (metal oxide semiconductor field effect transistor).
A MOSFET is a semiconductor device which is widely used for switching and amplifying electronic signals in the electronic devices. The MOSFET is a core of integrated circuit and can be designed and fabricated in a single chip due to very small sizes. The MOSFET is a four terminal device with source(S), gate (G), drain (D) and body (B) terminals. The body of the MOSFET is frequently connected to the source terminal so making it a three terminal device like field effect transistor. The MOSFET can be used in both analog and digital circuits.
As one of approaches fabricating the MOSFET, gate-last metal-gate/high-k technology (also called RMG, replacement metal gate) allows for MOSFET scaling to unprecedented levels. The terminology “last” refers to a metal electrode is deposited after the high temperature activation anneal(s) of a fabrication flow. For example, a hafnium dielectric is deposited early on in the fabrication flow, prior to when a sacrificial polysilicon gate is created. After the high-temperature S-D (source-drain) and silicide annealing cycles, the dummy gate (i.e., the sacrificial polysilicon gate) is removed and metal gate electrodes are deposited last.